A ferroelectric based non volatile SRAM optimized for critical embedded systems
Résumé
SRAMs are the fastest and most energy efficient commercial memories. However, they are volatile, which means that data must be transferred to a non volatile (NV) memory before power off, which is both time consuming and energy intensive. NVSRAMs overcome this problem by finely integrating non volatile storage elements (FeCAPs here) directly into SRAM bitcells. In this work, several design parameters are optimized to ensure error less data transfer from SRAM to FeCAPs and vice versa. A previously developed Fast-Erase system has been integrated for countering cold-boot attacks and improving the reliability of these data transfers. This circuit would therefore be capable of operating in ultra low power or critical systems with non reliable supplies.
Origine | Fichiers produits par l'(les) auteur(s) |
---|